Reduce the Cost of Testing System-On-A-Chip Devices

System-on-a-chip devices are spreading rapidly in the multi-media consumer market.These modern devices have more functions and higher performance than their predecessors, and offer tremerndous benefits. System-on-a-chip devices, however, are partiicularly cost-sensitive, and the cost of testing their advanced capabilities often is unacceptably high. One of the key issues in marking these devices economically viable is how to curb the cost of testing.

The TS6000 has been popular for testing various system-on-a-chip applications, from the latest large-scale devices through to widely-used single-chip MCUs, reflecting its outstanding cost-performance and ability to drastically reduce the cost of testing.

●High Cost-Performance

Utilizing the latest the latest system design and state-of-the-are device technology, the cost of the TS6000 system has been greatly reduced without compromising its underlying functions and performance, or its ability to meet the changing testing needs of the future.

● 512 Pins, Full-fledged Per-pin Capability

Timing edges, DC voltage levels/measurement, and other settings can be made for each pin. This feature removes needless restrictions on the test condition settings, and thus radically reduces the test time. In addition, parallel testing, which is very effective for reducing the cost of testing, is easily accommodated by this architecture.

●SCAN,ALPG Options

These options are ideal for large-scale system-on-a-chip devices, such as those having more than 10M gates or large-capacity embedded DRAM.

●ANALOG OPTIONS

Ivncorporating the TS1000's field-proven analong options,the TS6000 can be used for advanced mixed-signal tests.

●TEST COMPONENTS

By installing a device-specific test componed on the tester load board,the TS6000 can efficiently and economically test the device.

●Powerful Conversion Tools for Revieing Your Existing Resources

The extensive vector pattern instuction set of the TS6000 contains most of the pattern instuction of conventional test systems. Thus, any vector pattern program can be easily converted for use with the TS6000. Various conversion tools are also available for converting to and from other test program formats, so the TS6000 can be easily used in tandem with other test systems.

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Data rate : max 60MHz
Number of pins :max 512
Overall timing accurary(OTA) :±800ps
Parallel measurement :4DUT*2 test heads